Computer architectures - Supplement



Assembly simulation: basics

In the following, you could write a simple assembly program which can be executed step by step by a simple simulation. For the sake of simplicity, we assume that each instruction is 4 bytes long. Accordingly, the instruction register (IR) is also 4 bytes long, and the instruction pointer register (IP) will be increased by 4 bytes at the end of each instruction fetch stage.

Note that this assumption is valid only in this "virtual" environment and it is, evidently, a rather rough approximation of the real case.

We present the content of the memory organized by 4-byte long (doubleword length) cells. So when we store in the stack a 8-byte long (quadword length) data, it needs two adjacent memory cells, where the first cell contains the quadword value, and the second cell contains the (----) string indicating that the two adjacent cells are closely related.

We shall use arbitrary physical addresses for the part of the memory where the program is stored (started from the physical address 1000), and the part of the memory where the stack is located (started from the physical address 5000). Note that the number of lines are limited in both cases.

The initial values of some registers as well as those of some memory cells are not relevant to the simulation (because they depend on the calling program or environment). We used mostly "..." for those values and letters with gray font color for the addresses of those values in the memory.

The following x86/x64 assembly instructions can be used:

  • pushq
  • popq
  • movq
    • movl
  • addq
    • addl
  • incq
    • incl
  • subq
    • subl
  • decq
    • decl
  • cmpq
    • cmpl
  • jmp
    • jl
    • jle
    • jg
    • jge
    • jz
    • jnz
  • leaq
  • call
    • call printf
      → use label: .ascii "..." for the format string
      → use a maximum of three %d format specifiers
      → use %rcx, %rdx, %r8 and %r9 to transfer arguments
  • ret

Copy an assembly program into the textbox below:



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The following assembly programs were tested:



Assembly simulation

Special-purpose registers
%rip
(ir) ...
%rbp
%rsp
General-purpose registers
%rax (%eax)
%rbx (%ebx)
%rcx (%ecx)
%rdx (%edx)
%r8 (%r8d)
%r9 (%r9d)
Flags register
63 ... 11 ... 7 6 5 ... 1 0
OF SF ZF CF

Display screen:

Memory
Program area   Stack area
.... ....
1000 5000
1004 5004
1008 5008
1012 5012
1016 5016
1020 5020
1024 5024
1028 5028
1032 5032
1036 5036
1040 5040
1044 5044
1048 5048
1052 5052
1056 5056
1060 5060
1064 5064
1068 5068
1072 5072
1076 5076
1080 5080
1084 5084
1088 5088
1092 5092
1096 5096
1100 5100
1104 5104
1108 5108
1112 5112
1116 5116
1120 5120
1124 5124
1128 5128
1132 5132
1136 5136
1140 5140
1144 5144
1148 5148
1152 5152
1156 5156
1160 5160
1164 5164
1168 5168
1172 5172
1176 5176
1180 5180
1184 5184
1188 5188
1192 5192
1196 5196
1200 5200
1204 5204
1208 5208
.... ....


Boda István, 2026.